The fabrication of microelectronic devices involves forming electronic components on microelectronic substrates, such as silicon wafers. These electronic components may include transistors, resistors, capacitors, and the like, with intermediate and overlying metallization patterns at varying levels, separated by dielectric materials, which interconnect the electrical components to form integrated circuits.
Metal-oxide-semiconductor (MOS) transistors, such as MOS field effect transistors (MOSFET), are commonly used in the fabrication of microelectronic devices. Generally, three electrical contacts are made to each MOS transistor. Two contacts are made to two contact regions (i.e., one to a source region and one to a drain region) and one contact is made to the gate stack. As semiconductor nodes are scaled down to the 45 nm level and beyond, the transistors and contacts become increasingly smaller and the electrical resistance inherent to standard silicide contact structures increases to unacceptable levels.
Accordingly, improved electrical contacts are needed for small scale MOS transistors, such as transistors used in 45 nm nodes, as well as methods for manufacturing such improved electrical contacts.